This invention relates, in general, to semiconductor processing and more particularly, to methods for forming strained heterojunction semiconductor devices.
Strained semiconductor heterostructures are useful for a wide variety of device applications where a narrowed bandgap can improve device performance. For example, in heterojunction metal oxide semiconductor field effect transistor (MOSFET) devices, a strained channel region enhances carrier mobility within the channel. In strained silicon channel regions, the strained silicon layer typically is formed on a substrate of greater lattice parameters than that of silicon. A relaxed silicon-germanium substrate is a suitable material because of its compatibility with silicon processing.
One reported approach to forming a strained silicon channel layer involves growing a silicon layer on an as-grown relaxed or unstrained SiGe layer. The relaxed SiGe layer is formed by first growing a graded Si.sub.1-x Ge.sub.x layer on a silicon substrate where x increases from 0% to 30% over a thickness of about 1.5 microns. Next, a 1.0 micron layer of Si.sub.0.7 Ge.sub.0.3 is grown over the graded layer followed a thin Si.sub.1-x Ge.sub.x layer where x decreases from 30% to 0% over a thickness of about 0.03 microns. This approach has several disadvantages including a high epitaxial film cost because it takes approximately 6-8 hours to grow the different layers. Additionally, this approach results in a high concentration of threading dislocations because of the thick epitaxial layers.
Accordingly, methods are needed for forming heterojunction devices having strained layers formed on relaxed layers with low levels of defects. It would be of further advantage for these methods to be cost effective.